1. The Field of the Invention
The present invention relates generally to offset compensated amplifier structures operating in track and hold or sample and hold mode (hereinafter referred to collectively as “track and hold”, that perform offset compensation during the holding phase.
2. Background and Relevant Art
The track and hold circuit is a key building block for circuit designers. Track and hold circuits receive an analog signal that may vary over time. The track and hold circuit operates in two phases, a tracking phase and a holding phase. During the tracking phase, the output of the track and hold circuit approximately tracks the input signal of the circuit. During the holding phase, the circuit outputs a constant value that represents the strength of the input analog signal at a particular instant in time.
FIG. 6 illustrates a track and hold circuit 600 in accordance with the prior art. During the tracking phase, switch 603 is closed. In this closed loop configuration, each of the operational amplifiers 601 and 602 has unity gain. Thus, the output voltage VOUT tracks the voltage provided at the positive input terminal of the operational amplifier 602, which tracks the input voltage provided to the positive input terminal of the operational amplifier 601.
At the transition from the tracking phase to the holding phase, the switch 603 is opened, thereby isolating charge stored at the upper terminal of the holding capacitor 604. In this configuration, the voltage at the positive input terminal of operational amplifier 602 is held constant. The operational amplifier 602 is still in unity gain configuration and thus the held voltage is provided as the output voltage VOUT of the track and hold circuit 600.
Also during the holding phase, the held output voltage VOUT is provided to the negative input terminal of operational amplifier 601. The operational amplifier 601 is now in open loop configuration and thus has a high gain. In this open loop configuration, even if the voltage VIN is constant and identical to the held voltage VOUT, the inherent input offset of the operational amplifier 601 will result in large variances in the voltage at the output terminal of the operational amplifier 601. Often, the output voltage may even saturate to either the negative supply voltage or the positive supply voltage.
Accordingly, a large voltage differential may develop across the switch 603 during the holding phase. When the switch is closed at the transition from the holding phase to the next tracking phase, a rather significant amount of charge redistribution will occur across the switch 603. This is reflected through the unity gain operational amplifier 602 as rippling on the output voltage VOUT. This rippling degrades output signal quality and may cause unwanted Electro-Magnetic Interference (EMI), which could affect the performance of surrounding circuitry. Furthermore, in order to obtain accurate tracking, this rippling should be eliminated as much as possible. In order not to disturb the next holding phase, the rippling should settle within certain tolerances before the next holding phase begins. This settling time may result in inaccuracies and delays, thereby adversely impacting the circuit's primary function, and slowing the operation of the track and hold circuit for a given level of accuracy and resolution.
In order to increase the accuracy of the input voltage tracking and the accuracy of the voltage held during the holding phase, many conventional track and hold amplifiers employ offset compensation circuitry that compensates for the offset problems in the input operational amplifier. Typically the offset compensation of the input operational amplifier 601 is done by disconnect its negative input terminal from output node VOUT. The terminal is then connected to the input voltage node VIN, thus realizing a short between the input terminals of operational amplifier 601. The offset of this input operational amplifier is thus amplified with open loop gain of 601 to its output, where amplified offset information is processed by an analog or digital offset compensating feedback loop. Such conventional sample and hold circuits still develop large voltage differentials across the switch 603 during the holding phase, causing rippling of output voltage VOUT at the transitions between the holding and the tracking phase. To reduce this rippling, such circuits may, for example, clamp the output terminal of the input operational amplifier to a particular voltage during the holding phase. Nevertheless, there may still be some significant voltage differential across the switch 603 depending on the difference between the clamp voltage and the previously held voltage. Such a voltage differential may still result in rippling once the switch is closed.
Such conventional track and hold circuits compensate for offset of the input operational amplifier, but do not account for a varying operating points of the amplifier structure as input voltage is varying. Specifically, the input offset of the amplifier structure may depend on the input voltages. Typically, the offset value and sign is evaluated against a fixed reference level present on the output of the input operational amplifier. This would cause the operating point-dependent offset component to remain uncompensated in such structures, causing the additional distortion of output signal.
Other conventional sample and hold circuit use circuitry that requires one or more additional capacitors beyond the needed hold capacitor in order to eliminate rippling of output signal caused by voltage differential across the switch 603. Capacitors, while small in a simple circuit diagram, may occupy significant layout area in order to provide a reasonable amount of capacitance to efficiently filter the rippling. The presence of additional capacitors may thus significantly increase the size of the resulting circuit and slow down its operation.
Accordingly, what would be advantageous is a track and hold circuit that reduces rippling and compensates offset (including its operating point related component) even if the input voltage varies significantly during the holding phase, and which does not require additional capacitors.